Question: For a circuit we would like to implement, there are two control signals:
x
and
y
. If
xy
= 01, an 8
-
bit value
R
is incremented by 1 and control goes to a second state. If
xy
= 10,
R
is
cleared to zero and control goes from the initial state to a thi
rd state. Otherwise, control stays in
the initial state. The second and the third states return the control to the initial state at the next
clock cycle without doing any further operation. For this circuit, draw (1) a block diagram
showing the controller,
datapath (with its internal components), and signals, (2) a high
-
level state
machine illustrating its overall behavior, (3) the finite state machine for its controller  Edit